STLS2F Loongson 2F high performance bit superscalar MIPS. ® microprocessor. Features. □ bit superscalar architecture. □ MHz clock frequency. Loongson 2F: High performance bit superscalar MIPS. ® microprocessor. Features. □ bit superscalar architecture. □ MHz clock. ICT Loongson 2F (ST STLS2F01) (Godson-2). ICT Loongson 2F ( MHz) (90 nm) + MB of DDR2. Lemote YeeLoong notebook. 4-way superscalar.

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Archived from the original on 4 June Li Guojie, chairman of Dawning Information Industry Company and director and academician of the Institute of Computing Technology, said research and development of the Loontson is expected to be completed in two years. June Learn how and when to remove this template message.

Committed instructions are sent to the register mapping module to confirm loingson mapping of its destination register and release the old one.

It may also get the data directly from one of the result buses if its source register number matches the destination register number of the result bus. This desktop solution uses an optimized version of Fedora 13, with a lot of software loongsln and available, such as Kingsoft WPS office suite. Loongson is the result of a public—private partnership.

The renamed instructions are latched to be sent to reservation stations and queues in next cycle. They are also sent to the memory access queue to allow committed store instructions to write cache or memory. It was formerly called Godson.


Intel Core 2 Duo P vs vs Loongson 2F MHz

Archived from the original on The Loongson 3 adds over new instructions over Loongson 2. Inter-instruction koongson among four instructions mapped in the same cycle are also checked. The value is then sent to memory access queue, where dynamic memory disambiguation and memory forwarding is performed.

The Godson 2F, released to market in earlyran at 1.

Early implementations of 2r family lacked four instructions patented by MIPS Technologies to avoid legal issues. Open source applications on Linux Platform can be ported with little effort. Retrieved from ” https: ICT has launched a Loongson-3B-based six-core desktop solution. Loongson insiders [56] revealed a new model based on the Loongson 3A quad-core laptop has been developed and is expected to lkongson in August As one of the domestic CPU of China, Loongson 3A is being commercialized, and in the recently exhibition in Nanjingbased on the Loongson 3A motherboard developers computer quietly debut.

A new physical register is allocated for each logical destination register, and the logical source register is renamed according to the latest physical register allocated for the same logical register. Each empty loongsno of reservation stations and queues selects among four dispatched instructions in this cycle. It is fabricated with 0. This list is incomplete ; you can help by expanding it.


Associated instructions are also sent to branch queue and memory queue. Wikinews has related news: Broadcom various Cavium Octeon. For loonson performance, because the frequency is only 1. The topic of the speech was “Research and Development of Godson processors”. Retrieved 26 May The highest frequency of Godson-3B is 1. Renamed instructions are dispatched to the fixed- or floating-point reservation station to be executed, and are sent to the reorder queue for in-order graduation.

Loongson 2F 900MHz vs MediaTek MT8163 V/A 1.5 GHz

Archived from the original on 23 October Archived from the original on 25 July The four instructions in IR are decoded in the internal format and sent to the register renaming module. This article’s use of external links may not follow Wikipedia’s policies or guidelines.

Many operating systems work on Loongson: The manufacturer states that the user experience of the desktop solution has been significantly improved over its Loongson-3A based predecessor.

Instructions are executed according to its type and execution results are written back to the register file.